Micron has revealed an ambitious technology roadmap designed to meet the growing demands of artificial intelligence.

The company wants to push the limits of performance and power use in data centers, mobile devices, and high-performance computing systems through key advances in DRAM memory and NAND storage.

On the RAM side, the DDR6 architecture is shaping up to be a big leap between generations, doubling the bandwidth offered by DDR5. At the same time, LPDDR6 promises an energy efficiency gain of more than 35% over LPDDR5, which is key for both high-end smartphones and data centers focused on efficiency. Both standards will be powered by Micron’s next manufacturing node, 1δ (1-Delta), which brings process control at the angstrom level and a much better bit density.

For critical AI uses, where fast data transfer decides how fast things get processed, Micron is betting on new ideas in HBM memory. The company plans to move from standard designs to custom solutions and vHBM (Vertical 3D HBM) designs. This vertical approach stacks the memory directly on top of the compute chip, making the path between the two parts shorter and getting the most bandwidth per watt.

As for flash storage, the next-generation G11 NAND will go beyond 400 layers using wafer-on-wafer bonding technology. Compared to the current G9 generation, this design will double bit density, raise input/output speed by up to 1.5x, and cut power use by more than 25% per bit moved.

With these developments planned for the end of this decade, and the first mass production of the 1δ node and G11 NAND expected in the second half of 2027, Micron wants to strengthen its leadership and its strong position for the needs of AI.